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SAN JOSE, Calif.—Apple Computer Inc.s plan to switch to Intel Corp. processors from PowerPC CPUs will not change IBMs marketing focus for the chips.
Regardless of Apples plans, “both servers and embedded” will remain the target markets for these CPUs, including the PowerPC 970MP, the latest version, said Norman Rohrer, distinguished engineer and one of IBMs top chip designers, in his presentation at the In-Stat Fall Processor Forum here Tuesday.
Rohrer provided a detailed view of the new PowerPC 970MP multicore processor, the chip behind Apples new Power Mac line. The PowerPC 970MP, which will be available in clock speeds from 1.2GHz to 2.5GHz, is a “low-power, high-performance” processor, he said.
Based on the single-core POWER4 processor, the 970MP features twin cores, each with its own CPU, AltiVec SIMD unit and 1MB of L2 cache, Rohrer said. Though the chip itself is 64-bit, it is also compatible with 32-bit instructions, meaning that users will not have to upgrade software when migrating from previous PowerPC-based systems, he said.
Compared with its predecessor, the PowerPC 970FX, the 970MP will have twice the cache, a wider range of frequency tuning and voltage scaling, as well as the ability to run one or two cores.
Rorher said that initial tests showed a 2.5GHz 970MP reaching a score of 1,438 in the SPECint test, with a 2,076 score in the SPECfp test. Addressing the “low-power” side of his title, Rorher added that the 970MP will max out at 100W when both 2.5GHz cores are running.
Rohrer also said that the two cores of the PowerPC 970MP can operate at different wake/sleep states. When not needed, the second core will be able to work at one-quarter frequency, or even switch off.
This feature can reduce power consumption and heat by 50 percent. Both cores will also be able to run at full, one-half or one-quarter of its normal frequency, or enter a “deep nap” state that uses 1/64th the power.
Next Page: What consumers want in chip design.
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The microprocessor industry is under pressure from consumers and system designers to produce chips that are faster and cheaper and use less power, but deliver more features, observed Cadence Design Systems Inc. CEO Mike Fister in his keynote address Tuesday, “What Consumers Want: The Next Big Challenge in Integrated Circuit Design.”
Most consumers dont want complex technology products, Fister noted. Yet what they demand—faster products with more features—requires that chip designers and manufacturers create more-complex processor designs that are inexpensive and low-power.
“Tech customers arent constrained [in their desires] by what is technologically possible, ” Fister said, “yet they are dependent on it.”
Fister identified three constraints on chip design: time to market, managing complexity and cost.
“Life was good in the 80s,” he said. Then, he said, the military was a prime consumer of chips and was able to deal with complex products. In addition, he said, one or a few people could shepherd the design of a chip through the manufacturing process.
“Then, you could attack design and manufacturing issues with humans,” he said. But with the steady advances in microprocessor design bringing a constant increase in transistors per processor, “theres not anyone smart enough today” to do this, he said.
“Everything is a multidimensional problem now,” Fister said. When trying to make a chip that is small, low-power and easy to manufacture, “you tend to solve for one at the cost of another,” he said.
This, he said, is where Electronic Design Automation (EDA) tools, such as those Cadence produces, come into play. “We can focus on the breadth of looking at the problems all at once,” he said.
Fister compared the EDA market to the early days of the IT industry. “Everyone used to build their own operating system and their own databases,” he said. “But now, after companies like Oracle and Sybase,” he noted, “no one builds their own. This removes the drudgery of building everything from scratch and enables companies to focus on adding value to their products.”
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