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    Chip Choice Challenges

    Written by

    Peter Coffee
    Published October 16, 2002
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      If you ran one of the handful of companies that will soon be able to build a billion-transistor chip, youd also work hard to build demand for such a device. With the opening keynote speech at Microprocessor Forum 2002, Intel started the early advance work in that campaign–but also tipped its hand as to its likely reliance on “hairball” marketing, the continuing discouragement of best-of-breed integration by technology buyers.

      “Im not announcing a new product,” said Intel Fellow John Crawford, as he outlined the transistor budget for a possible multi-core server processor combining four Itanium 2 engines, a shared cache of 12MB to 16MB, and an advanced interconnection scheme. “But this is a manufacturable die size. One billion transistors can and will be used.”

      Crawford noted that cache alone would account for as much as 80 percent or 90 percent of the transistors, observing that “memory performance grows at a dramatically slower pace [than Moores Law processor improvements]. Caches are important.”

      Crawford also noted that theres plenty of work on the horizon for chips with such massive processing resources. He predicted that managed run-time environments, like those of Java and Microsoft .Net software, should represent the majority of running server and client code by 2005; these technologies demand just-in-time compilation, memory management and additional processing due to their “late binding” of high-level code to underlying platform mechanisms. “We need to add these workloads to our design sets,” he observed.

      But other Intel presentations during the day showed another path to billion-transistor products.

      In presentations of the forthcoming Banias processor family, aimed at mobile applications, forum attendees heard again and again that “Intels Banias platform is designed and validated to work together,” as asserted by Mooly Eden, general manager of Intels Israel Design Center. The processor, chip sets and wireless LAN technology are being presented as an integral proposition–and that reminds me, a little uncomfortably, of Microsofts position on its “single integrated product” of Windows.

      Yes, Intel is right to warn us that “standards arent a guarantee of actual interoperability,” as one Intel official commented at a subsequent briefing. But theres something to be said for high-performance, standards-based interconnection schemes–such as the HyperTransport protocol that played a prominent part in AMDs afternoon presentation on its forthcoming Opteron processors.

      If you had the resources to put a billion transistors on one chip, and the kind of business model needed to make and sell chips on the leading edge of complexity to maintain your accustomed margins, youd want prospective silicon buyers to think twice before buying best-of-breed chips for specific tasks. Youd rather not have buyers shopping for their general processing, graphics, signal processing and other functions for integration and product differentiation. Youd want them to feel more comfortable buying your monolithic solution.

      “Intel is an awesome, capital-rich manufacturing machine,” observed Microprocessor Forum founder Michael Slater, in a 15th-anniversary observance at the end of this first day of this venerable conference. “No company will find it easy to dislodge Intel from any business in which it chooses to defend its position. But this has very little to do with architectures. Its about business.”

      Buyers who are accustomed to think of chip choices as choices among technologies should bear this thought in mind: As technologies become pervasive, the difference between one offering and another is not so much about what a vendor can do as what it chooses to do–and to hope that it can make buyers prefer.

      Technology Editor Peter Coffee can be reached at [email protected].

      Peter Coffee
      Peter Coffee
      Peter Coffee is Director of Platform Research at salesforce.com, where he serves as a liaison with the developer community to define the opportunity and clarify developers' technical requirements on the company's evolving Apex Platform. Peter previously spent 18 years with eWEEK (formerly PC Week), the national news magazine of enterprise technology practice, where he reviewed software development tools and methods and wrote regular columns on emerging technologies and professional community issues.Before he began writing full-time in 1989, Peter spent eleven years in technical and management positions at Exxon and The Aerospace Corporation, including management of the latter company's first desktop computing planning team and applied research in applications of artificial intelligence techniques. He holds an engineering degree from MIT and an MBA from Pepperdine University, he has held teaching appointments in computer science, business analytics and information systems management at Pepperdine, UCLA, and Chapman College.

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