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IBM Corp. researchers say they have made a breakthrough in chip development that could lead to processors that are smaller but more powerful than the current offerings.
In a paper scheduled to be presented on Monday at the IEEE International Electron Devices Meeting in Washington, D.C., IBM researchers will say they have used a technique called “molecular self-assembly” to create important parts of a semiconductor memory device. According to the researchers, from IBMs Yorktown Heights, N.Y., research lab, the self-assembly technique takes advantage of a reliable way that certain types of polymer molecules come together and organize themselves.
The result of that tendency are patterns that can be used to create device features that are smaller, denser and more uniform than techniques currently used, such as lithography, according to IBM. Chip makers will still be able to use lithography for many more years to create smaller and faster chips, but that will also increase the cost and complexity of the technique, according to an IBM spokesman.
Molecular self-assembly, an approach based on nanotechnology, will give processor manufacturers another method to shrink the chips while boosting the performance. According to IBM, it also is compatible with existing chip-making tools, enabling manufacturers to implement the technique without greatly increasing costs by having to retool machines and assume risks that come with major changes in processes. The result could be more-powerful processors for everything from computers to wireless devices, the spokesman said.
IBM researchers expect molecular self-assembly to be used in pilot programs within three to five years.
In creating the crucial parts of the semiconductor memory device using the technique, researchers were able to create a dense silicon nanocrystal array, the basis for a variant of conventional flash memory. Nanocrystal memories are difficult to make via traditional methods, according to IBM. By using the molecular self-assembly technique, researchers have found an easier way to create the semiconductor device. It was performed on 200-mm silicon wafers, IBM said.
The paper to be presented on Monday is titled “Low Voltage, Scalable Nanocrystal FLASH Memory Fabricated by Templated Self Assembly.”
Nanotechnology is a burgeoning field in which researchers work on materials at the atomic or molecular level. Self-assembly is a subset of nanotechnology.