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    Intel CEO Introduces 64-Bit Extensions

    Written by

    Mark Hachman
    Published February 17, 2004
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      SAN FRANCISCO—Intel Corp. chief executive Craig Barrett opened the Intel Developer Forum here by talking about transformations, including the companys transformation of its 32-bit processor line through 64-bit extensions.

      Barrett introduced the concept of 64-bit “extensions” to Intels 32-bit processors, which some have called the companys “Clackamas” or Compatibility technology. However, the technology will for now be reserved for enterprise applications, and specifically the 32-bit Xeon processor.

      /zimages/5/28571.gifIntel recently released its Prescott processor but left the 64-bit question up in the air. Click here to read more about the controversy.

      Barrett presented the new extensions as part of an Intel end-to-end solution, which would allow the company to serve the market of high-end enterprise applications on down to single-processor workstations.

      The new extensions will allow otherwise 64-bit systems to more effectively process 32-bit applications through access to a greater amount of memory address space, Barrett said, which has consistently been Intels position on 64-bit extensions, dating back to Intels last IDF in September.

      /zimages/5/28571.gif

      The CT technology will first appear in the “Nocona” Xeon processor in the second quarter, as well as the “Potomac” multiprocessor Xeon in 2005.

      The technology will also be used in the CT-enhanced single-processor “Prescott” chip for workstations, although a date for its release has not been disclosed, said Intel spokesman Scott McLaughlin. Analysts concluded that the development of a workstation chip based on the Prescott core used by the Pentium 4 signifies that the technology could eventually be turned on for desktop PCs.

      However, the CT technology will not, for now, only be used in Intels server line. “The server business is the only thing were looking at the moment,” Barrett said.

      Barrett indicated that the CT technology will use a 40-bit physical address space, or address up to a terabyte of DRAM.

      “Thats about a $100,000 memory system—big, but affordable,” said Martin Reynolds, an analyst at Gartner Inc. in San Jose.

      “Big iron” servers, however, require error-correction capability and powerful floating-point performance, which will not be improved through the new extensions, Barrett said.

      /zimages/5/28571.gifClick here to read the full story on ExtremeTech.com.

      Mark Hachman
      Mark Hachman

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