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    Intel Moves Away From Tick-Tock Chip Production Cycle

    Written by

    Jeff Burt
    Published March 23, 2016
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      Intel CEO Brian Krzanich last year said that with 14-nanometer chips, the company was moving away from its “tick-tock” cadence for manufacturing processors by adding a third 14nm chip to its lineup, pushing back by a year the introduction of its first 10nm processor.

      Now the world’s largest chip maker seems to be formalizing the new schedule. In a 10-K filing with the Securities and Exchange Commission (SEC) March 22, Intel officials said they will continue introducing new microarchitectures for its Core PC and Xeon server chips on a regular cadence, but that the cadence will be stretched from the every-two-years schedule under the tick-tock process, possibly to as much as two-and-a-half years.

      The extended schedule that is being used for Intel’s 14nm chips will be applied to the upcoming 10nm processors, with the first of those chips expected to be introduced next year.

      “We expect to lengthen the amount of time we will utilize our 14nm and our next-generation 10nm process technologies, further optimizing our products and process technologies while meeting the yearly market cadence for product introductions,” the officials wrote in the filing.

      For almost a decade, Intel has relied on the tick-tock cadence to enable it to keep up with Moore’s Law—the idea proposed by Intel co-founder Gordon Moore more than 50 years ago that the number of transistors in a chip would double every two years—while continuing to shrink the size of its processors. On a tick year, Intel unveils a new smaller process—for example, when the company first moved to 14nm with “Broadwell.” The tock happens the following year, when a new chip at the same size is introduced with a range of enhancements for improved performance and energy efficiency. In the 14nm family, it’s represented by the “Skylake” processors.

      However, the continued shrinking of the circuitry of the chip presents manufacturing challenges, which forced Intel to delay the move from the 22nm process to Broadwell by several months. The plan initially was to move from 14nm to the first 10nm chip—”Cannonlake”—later in 2016. That said, Intel announced last year that it was adding a third 14nm processor—”Kaby Lake”—to the lineup and pushing Cannonlake into 2017.

      On a conference call in July 2015, Krzanich said the schedule was extending as the company continued to shrink the chips.

      “When you look at the pattern we’ve been having with the same kind of sets of conditions—which was the 22-nanometer technology and the 14-nanometer technology—we said those took about two-and-a-half years,” he said at the time, adding that customers told him that being predictable in the schedule was as important to them as continuing to drive innovation. “We chose to actually just go ahead and—since nothing else had changed—insert this third wave [with Kaby Lake].”

      At the time, Krzanich said Intel hoped to return to the two-year tick-tock schedule, but added that the company would continue to evaluate the situation. With the SEC filing, officials are saying that the new cadence—process, architecture, optimization, rather than tick-tock—will be the norm through at least 10nm.

      “We have continued expanding on the advances anticipated by Moore’s Law by bringing new capabilities into silicon and producing new products optimized for a wider variety of applications,” they wrote. “We expect these advances will result in a significant reduction in transistor leakage, lower active power and an increase in transistor density to enable more smaller form factors, such as powerful, feature-rich phones and tablets with a longer battery life.”

      Intel Moves Away from Tick-Tock Chip Production Cycle

      Patrick Moorhead, principal analyst at Moor Insights and Strategy, told eWEEK he is not yet convinced that the change in cadence is a permanent strategy, but that “if true, it is a reflection in the changes made to Moore’s Law.” It’s also an indication of Intel’s understanding that processor improvements don’t always need to be tied to major architectural upgrades or process node changes, he said.

      Moorhead noted that improvements can be made to everything from pre-fetching to caching within in the chip to bring about significant performance improvements. Intel also is on board with the trend toward accelerated computing, where components like GPUs, digital signal processors (DSPs) and field-programmable gate arrays (FPGAs) are integrated into the chip to increase performance. Intel last year bought FPGA maker Altera for $16.7 billion.

      The analyst also didn’t believe that the apparent change in Intel’s manufacturing schedule was an indication that Moore’s Law was reaching the end of the line.

      “I’ve seen the rumors of Moore’s Law’s death during my nearly 30-year career,” Moorhead said. “It’s certainly been harder [to keep up with Moore’s Law] as we go along … but no one’s really thinking about the death of Moore’s Law. Researchers have always found a way.”

      Jeff Burt
      Jeff Burt
      Jeffrey Burt has been with eWEEK since 2000, covering an array of areas that includes servers, networking, PCs, processors, converged infrastructure, unified communications and the Internet of things.

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