Intel's Upcoming Xeon Phi Will Include 384GB of DDR4 Memory

The Knights Landing chip will offer 3 teraflops of performance and three times the single-thread performance of the current Knights Corner chip.

Intel Knights Landing

HILLSBORO, Oregon—Intel executives are continuing to slowly release new details on the company's upcoming Knights Landing offering, the next generation of its many-core Xeon Phi silicon product due out in the second half of the year.

Knights Landing—which will be the follow-on to Intel's current Knights Corner—will offer up to 384GB of native DDR4 memory (delivered via six channels) and up to 36 PCIe 3.0 lanes for faster I/O capabilities, company officials said during a briefing with about a dozen journalists at Intel's offices here.

In addition, Knights Landing will offer Intel's Omni-Path integrated onto the chip as an option, according to Hugo Saleh, director of marketing and industry development for the technical computing group within Intel's Data Center Group. Omni-Path is a high-speed interconnect optimized for high-performance computing (HPC) environments that Intel officials say will challenge InfiniBand in the space.

Saleh and other Intel officials said more details will come as the release date approaches—for example, they would not say exactly how many x86 processing cores the chip will hold, only that it will be more than 60—but that the goal is still to give Knights Landing the capabilities to run as a stand-alone server processor, and not just as a co-processor to run alongside Xeon server chips.

"It's an enterprise-class, reliable, enterprise-grade processor," Saleh said. "This is a server processor. We do support co-processing, but … this is a bootable processor. Anything a Xeon part can do, Knights Landing can do."

Intel in 2012 launched Knights Corner, the first product from its Many Integrated Core (MIC) program, to address the growing demand for more compute power and lower power consumption for highly parallel workloads coming from organizations in such fields as HPC, technical computing and supercomputing.

Such businesses and research institutions over the past several years have been turning to GPUs from Nvidia and Advanced Micro Devices to help accelerate such workloads by enabling primary processors to offload computing tasks to the GPUs. Intel introduced Xeon Phi as an alternative, giving organizations a coprocessor that could offer similar benefits and is based on the same x86 architecture—and offers the same ecosystem and development tools—that are found in mainstream Xeon chips that are found in most servers on the market.

The move toward accelerators in the HPC and supercomputing spaces continues to grow. Of the systems on the latest Top500 list of the world's fastest supercomputers released in November 2014, 75 use accelerators, about two-thirds of which leverage Nvidia's GPUs and, to a lesser extent, AMD's Radeon graphics technology, and 25 that run Xeon Phis.

With Knights Landing, Intel wants to make the Xeon Phi chips available as the primary processor, which means they won't have to take instructions from another Xeon processor.

It will be based on a version of Intel's Silvermont architecture, but will be binary-compatible with other Xeon chips that are based on the Haswell platform. Intel's Saleh said the company is targeting environments where scalability is important and the workloads are highly parallel. He also expects enterprises to continue to adopt parallel computing in their data centers.

Knights Landing will run Windows and Linux workloads.

"Now that this is a server processor, anything can run on it," said Avinash Sodani, chief architect for Knights Landing. "Once you become bootable, you can really run all types of things."

This chip will offer more than 3 teraflops of performance, more than 8 billion transistors and three times the single-thread performance of Knights Corner, Sodani said. It will include a two-dimensional mesh fabric and up to 16GB of on-package memory based on Micron's Hybrid Memory Cubes. Omni-Path is designed to offer 100G-bps line speed and up to 56 percent lower switch fabric latency than is found in compute clusters running InfiniBand. It will offer better scaling (48 ports) than InfiniBand (36 ports), enabling HPC organizations to run clusters with higher port density—up to 1.3 times better than with InfiniBand—and up to 50 percent fewer switches, Intel officials have said in the past.

Saleh said there are OEMs that are now testing Knights Landing, and that customers have committed more than 100 petaflops of system compute to deals using the chip.

During the SC14 supercomputing show in November, Intel officials talked about the company's road map for the Xeon Phi product line, including Knights Hill, which will follow Knights Landing. Knights Hill will be built on the company's 10-nanometer processor, and will be higher performing and more power-efficient than its predecessors. It also will use the second generation of the Omni-Path interconnect.

The new information about Knights Landing comes a week after Nvidia introduced its Titan X GPU at the GPU Technology Conference 2015. Titan X comes with more than 8 billion transistors and 3,072 CUDA cores, and offers up to 7 teraflops of single-precision performance.