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Tilera officials are continuing to grow the number of cores they’re putting on their processors as they push to eventually offer as many as 100 or more. The company took another step in that direction Feb. 19, when officials unveiled a 72-core processor, the Tile-Gx72.
The new system-on-a-chip (SoC) is being aimed at such environments as next-generation networks—including software-defined networks (SDNs)—cloud computing and multimedia. It is designed to double the compute performance and I/O capacity of its 36-core Tile-Gx36 chip, which the company launched less than a year ago.
“It’s going to be the biggest, baddest processor out there,” Bob Doud, director of processor strategy at Tilera, told eWEEK.
Since coming out of stealth mode in 2007, Tilera has been at the forefront of the many-core push in processors as businesses continue to demand greater performance from their systems as well as higher energy efficiency. Established players from Intel to IBM to Advanced Micro Devices have been increasing the core counts in their processors. At the same time, they also are introducing accelerators—such as Intel’s Xeon Phi chips and AMD’s GPUs—to work alongside traditional processors at add compute power to systems in hyperscale and high-performance computing (HPC) environments.
Tilera is rapidly growing the number of energy-efficient 64-bit cores housed in its processors, working toward as many as 100 cores or more, a goal that officials first started talking about in 2009 and which is still in the works.
The new Tile-Gx72 comes at a time of tremendous change in the data center, with rapid network traffic growth, cloud computing, mobile computing and the increase in video content all putting greater pressure on corporate networks. Businesses are looking to not only bulk up their networking capabilities to handle such trends, but also want to do more with the network, from data analysis to intrusion scanning, Doud said.
Tilera’s processor technology will help businesses address those issues, he said. The 72-core SoC can be used for networking and firewall appliances, as well as SDN networking, which demands high-throughput capabilities. It offers a transfer data rate of 100 gigabits per second, Layer 7 deep packet inspection of more than 50G bps, and intrusion prevention and detection at more than 20G bps.
It enables big data transaction processing at more than 4 million transactions per second and streaming video server and content delivery networking at 50G bps.
The Tile-Gx72 also comes with various Tilera technologies, from the iMesh two-dimensional interconnect, DDC distributed coherent cache and TileDirect direct-to-cache I/O for high compute-per-watt efficiency. According to Tilera officials, it offers 1.6 to two times the performance of other processors, four DDR3 (double data rate type 3) memory controllers, and on-chip I/O with the 100 Gigabit Ethernet—eight 10GbE ports configurable as 32 1GbE ports—and six PCI Express ports. The chip will run at 1 to 1.2GHz and offer 23MB of cache, and includes 16 cores that can be used for network interface card (NIC) functionality.
Doud also stressed the new chip’s software compatibility with Tilera’s other SoCs—which offer nine, 16 and 32 cores—and can run standard SMP Linux and C and C++ programming code, so developers don’t have to learn new coding to create software for the chip, as they might in environments that rely on GPUs.
“There’s no need for boutique programming,” he said.
The Tile-Gx72 is currently sampling, and Tilera will be demonstrating it at the RSA security conference in San Francisco, which runs Feb. 25 through March 1.