Intel Wraps Xeon Phi Branding Around MIC Coprocessors

The many integrated core initiative is a key part of Intel's larger HPC strategy, and the chip giant will offer coprocessors that initially will have more than 50 x86-based cores.

Intel executives are shedding more light on their efforts in the high-performance computing (HPC) space, and their desire to reach exascale computing by 2018, which currently centers on the company€™s newest Xeon chips, an expanded interconnect push and new branding around Intel€™s upcoming many integrated core (MIC) architecture.

Intel is two years into its MIC initiative, the chip maker€™s play to address the growth of graphics chips in systems, which are being embraced for the parallel-processing capabilities that are making them increasingly popular in the HPC and supercomputer fields. Intel is wrapping the brand name Xeon Phi around the MIC effort, which initially will offer coprocessors€”which work with CPUs, such as Intel€™s Xeon chips€”with more than 50 cores, according to Intel officials.

Along with the core count, the Xeon Phi chips will offer greater performance for workloads that demand parallel-processing capabilities as well as greater energy efficiency.

Intel executives unveiled the Xeon Phi brand June 18 at the International Supercomputing Conference (SC) in Hamburg, Germany.

Intel€™s x86-based processors€”including the Xeon chips€”are the dominant computing architecture, running the bulk of servers on the market. Intel also is a significant presence in the HPC space, a segment that is becoming increasingly important to the chip maker, according to Rajeeb Hazra, vice president of the Intel Architecture Group and general manager of technical computing at the company. HPC is one of three key target areas€”cloud and networking being the other two€”and promises 20 percent annual growth for Intel.

€œThis projects to be a major growth segment for the business,€ Hazra said in a conference call with journalists before the ISC announcement.

In March, Intel unveiled its Xeon E5-2600 processors, which offer up to eight cores, 80 percent better performance over the previous generation and 50 percent better energy efficiency. Officials said HPC and supercomputing would be key markets for the chips, which was confirmed at ISC with the release of the Top500 list of the world€™s fastest supercomputers. According to Intel, 44 supercomputers on the list run on Xeon E5-2600 processors, including the fourth-fastest in the world.

Intel also has been building out its interconnect capabilities, both internally and through such acquisitions as QLogic€™s InfiniBand products and Cray€™s networking assets.

The Xeon Phi push will be a key part of the initiative. Nvidia in recent years has made a push with its Tesla chips to bring graphics processing unit (GPU) capabilities€”long found in gaming systems€”to mainstream systems and supercomputers. The Tesla chips offer hundreds of cores designed to process complex workloads in parallel. A growing number of supercomputers on the Top500 list are hybrids, which use both CPUs and GPUs. The fifth-fastest system on the list, the Tianhe-A1 in China, was built using Intel Xeon chips and Nvidia GPUs.

Intel had a project called €œLarrabee€ underway to use graphics technology for coprocessing, but shelved it in 2009. In 2010, the company unveiled €œKnights Corner,€ the x86-based foundation for the MIC architecture. At the Supercomputing Conference in November 2011, Intel demonstrated a system running with MIC architecture inside.

Xeon Phi will be made via Intel€™s 22-nanometer manufacturing process and go into production later this year. The coprocessors essentially will offer the capability of running a teraflop of performance on a PCIe card. It will support standard Intel programming models and software tools, and will be able to run whole applications.

Intel€™s Hazra argued that having x86-based coprocessors offers an advantage over GPUs because of their ability to run more existing code. €œThis is generally a lot of not just interest, but business interest,€ he said.

Cray announced June 18 that its next-generation supercomputer, called €œCascade,€ will incorporate Xeon Phi coprocessors. Cray already uses GPUs as coprocessors€”its XK6 hybrid supercomputer leverages both CPUs from Advanced Micro Devices and Nvidia Tesla GPUs. Speaking on the Intel call with journalists, Cray President and CEO Peter Ungaro said the Xeon Phi will help his company broaden its capabilities and will play a role in Cray€™s €œadaptive supercomputing€ initiative. In addition, SGI officials said their new UV2 supercomputer, which also was announced June 18, will support the Intel MIC architecture.

Intel officials said a host of other vendors€”including IBM, Hewlett-Packard, Dell, Appro and Bull€”also have expressed support.