Supercomputer maker Cray will evaluate using ARM-based chips in its systems, an effort driven in part by an R&D contract from the Department of Energy.
Cray officials made the announcement at the SC14 supercomputing show in New Orleans, saying that the ARM architecture is one of several the company will evaluate as it looks to diversify the technology it uses in its supercomputers and other systems as part of its larger Adaptive Supercomputing strategy. The company’s systems currently run on Intel chips.
The Adaptive Supercomputing initiative, introduced in 2006, was launched to create a unified supercomputer architecture that can support a range of processing technologies, including GPU accelerators and Intel’s Xeon Phi coprocessors.
“We see alternatives such as 64-bit ARM, custom ASICs and low-power Intel processors as enabling technologies for certain HPC [high-performance computing] and analytics workloads, and a natural fit for our strategy,” Steve Scott, senior vice president and CTO for Cray, said in a statement.
The supercomputer maker is taking advantage of its partnership with Intel, its work with ARM and its partners like Cavium, and its participation in the Department of Energy’s (DoE) FastForward 2 project to evaluate those alternatives.
The Cray announcement is one of several at the supercomputing show by such companies as Cavium, Applied Micro and PathScale involving ARM and HPC. An array of chip makers, including Advanced Micro Devices and Marvell Technologies, are building chips based on ARM’s 64-bit ARMv8-A architecture as an alternative to Intel processors in the data center. ARM officials expect systems-on-a-chip (SoCs) and ARM-based systems to roll out into the market over the next several years.
According to Cray officials, the contract with the DoE asks the system maker to look into a broad range of 64-bit architectures for HPC.
In addition, Cray is working with Cavium to analyze the capabilities of ARM-based systems in supercomputing environments. The two companies will create Cray compute clusters powered by Cavium’s 48-core ThunderX ARM SoCs.
ARM’s low-power architecture—which can be found in most smartphones and tablets—is a good fit for the HPC space as it moves toward exascale computing, according to ARM CTO Mike Muller.
“The collaboration between ARM and its ecosystem partners has created a proven track record of energy-efficiency leadership and we firmly believe this can be applied to the supercomputing market,” Muller said in a statement.
Cavium unveiled ThunderX in June at the Computex 2014 show, with company officials saying they see an opportunity for the chips in mainstream systems as well as low-power microservers. At SC14, Cavium is demonstrating ThunderX running such operating systems as Red Hat Linux and Canonical’s Ubuntu distribution and applications likes Java 8 and Apache Web Server. The company also is showing off Cavium’s 1U (1.75-inch) and 2U (3.5-inch) server reference designs.
Officials with Applied Micro, which offers the ARM-based X-Gene server SoC, announced the company is collaborating with Red Hat and HPC system maker Cirrascale to create an HPC cluster that researchers at the Lawrence Livermore National Laboratory will evaluate as part of the Red Hat ARM Partner Early Access Program.
The cluster will be based on 78 Cirrascale 1U dual-node rack HPC servers, the RM1905D, that will run the eight-core X-Gene running at 2.4GHz as well as one to four GPU accelerators.
For their part, PathScale officials said their company’s new EKOPath Compiler for ARM-based servers running HPC applications will be available to customers for evaluation next month. Such compilers are a key part of ARM’s push to build a software ecosystem around its 64-bit architecture, including in the HPC space.
The EKOPath Compiler, which supports SIMD and AES instructions as well as C99, C++ 2003, C++11 and Fortran 90/95, will make it easier for ARM’s partners to deploy solutions for HPC environments, according to company officials.