eWEEK content and product recommendations are editorially independent. We may make money when you click on links to our partners. Learn More.
Intel is going to be putting its upcoming many-core Xeon Phi “Knights Landing” processors and other high-end computing technologies to work as the foundation for a supercomputer for the federal government that will be five to seven times more powerful than current systems.
Intel and supercomputer maker Cray were awarded a $200 million contract by the Department of Energy (DOE) to develop Aurora, a supercomputer that will offer 180 petaflops of performance. For comparison, the supercomputer that sits on top of the latest Top500 list of the world’s fastest system, the Tianhe-2 in China, has a peak performance of 33.68 petaflops (quadrillion floating point operations per second).
Aurora will be housed at the Argonne National Laboratory in Illinois, and is part of the DOE’s larger CORAL initiative. The system, scheduled to be delivered in 2018, is the third of three supercomputers being built under the DOE’s CORAL program. The $525 million Collaboration of Oak Ridge, Argonne and Lawrence Livermore (CORAL) initiative was launched in November 2014 to build supercomputers for each of the national labs that are five to seven times faster than current systems and will help the United States in the push toward exascale computing.
The agency already has awarded $325 million to IBM, Nvidia and Mellanox Technologies for the Summit and Sierra supercomputers that will be used at Oak Ridge and Lawrence Livermore labs.
In addition to building Aurora, the DOE also is commissioning Intel to build an interim system, called Theta, which will be delivered to Argonne next year. Theta will enable researchers at Argonne to begin transitioning their applications to the technology that will be used in Aurora. The smaller system also will be powered by the Knight Landing chips, will offer 8.5 petaflops of peak performance and will be based on Cray’s XC supercomputers.
Under the contract, Intel—through its high-performance computing (HPC) scalable system framework—will be the primary contractor, with Cray as the subcontractor and integrator, lending its supercomputing technology and HPC software stack. Aurora will be based on Cray’s next-generation supercomputer, code-named Shasta, which will be the successor to the company’s XC series of systems. Aurora will be the first system in the Shasta family, according to Cray President and CEO Peter Ungaro.
“Shasta will be a powerful combination of Intel’s new technologies and Cray’s advanced supercomputing expertise, creating a single, flexible system that will enable huge advances in computing and analytics,” Ungaro said in a statement.
Theta will have 2,500 nodes and consume up to 1.7 megawatts of power, while Aurora will include less than 50,000 and consume up to 13 megawatts. Aurora will be used for an array of tasks, from designing new classes of material that will lead to more efficient and durable batteries and solar panels to developing better biofuels, more aerodynamic features in transportation systems and renewable energy technologies.
Intel, Cray Awarded $200 Million to Build Powerful Supercomputer
The DOE’s selection of Intel as the lead contractor is a validation of the work the chip maker has done in the HPC space, according to Raj Hazra, vice president of Intel’s Data Center Group and general manager of its Technical Computing Group.
“Intel’s HPC scalable system framework enables balanced, scalable and efficient systems while extending the ecosystem’s decades of software investment to future generations,” Hazra said in a statement.
Intel has made strides over the past several years to build its HPC capabilities, including buying Cray’s Aries interconnect technology and QLogic’s TrueScale InfiniBand networking technology, both in 2012. Aries will be the interconnect technology for Theta, while Intel’s upcoming high-speed Omni-Path interconnect technology will be used in Aurora.
Omni-Path, which will be available as an integrated offering in Knights Landing, is designed to offer 100G-bps line speed up to 56 percent lower switch fabric latency than is found in compute clusters running InfiniBand and better scaling than InfiniBand, according to Intel officials.
Intel launched Xeon Phi in 2012 as x86-based coprocessors to be used in a similar fashion as GPU accelerators from Nvidia and Advanced Micro Devices. They run alongside CPUs, which offload workloads onto the accelerators, which improve the performance of the systems but help keep power consumption in check. However, Knights Landing—which is due out in the second half of the year—is designed primarily to be used as a stand-alone server processor, though it also can still be used as a coprocessor.
Company officials have given some details about Knights Landing—it will have more than 60 cores, up to 384GB of native DDR4 memory and up to 36 PCIe 3.0 lanes for faster I/O capabilities—and have said more will be released as the launch date approaches.
In addition to the CORAL program, the government also is pushing toward exascale computing through other initiatives, such as the DesignForward HPC R&D program. Through the initiative, the Office of Science and National Nuclear Security Administration already has awarded $25.4 million to the likes of Cray, IBM and AMD.