Intel Latest Xeon Phi Chips Coming to Supercomputers in 2016

At the SC 15 supercomputer show, Intel officials talk about the growth of its HPC Scalable Systems Framework with Xeon Phi and Omni-Path Fabric.

Intel processor

Supercomputers armed with the next generation of Intel's many-core Xeon Phi processor will begin appearing next year, though some hardware makers currently are running pre-production versions of the chip in systems as they gear up for supercomputer deployments.

At the same time, Intel officials at the SC 15 supercomputer show in Austin, Texas, on Nov. 16 also announced that the company's Omni-Path Architecture fabric technology designed for high-performance computing (HPC) environments also is launching, bringing improved performance to the workloads running in clusters.

Both the 14-nanometer "Knights Landing" Xeon Phi chip and Omni-Path Architecture are part of Intel's larger HPC Scalable System Framework (SSF), an effort unveiled in April that officials said offers organizations the technology they need to create HPC-level environments, with a focus on the overall system rather than the components. The framework spans everything from smaller clusters to supercomputers for on-premises and cloud-based workloads, and includes other Intel technology, including Xeon processors, Intel solid-state drives (SSDs), Lustre tools, silicon photonics and Intel's Ethernet offerings.

More than a dozen system vendors—including Dell, Hewlett Packard Enterprise (HPE), Cray, Fujitsu and SGI—are embracing the SSF initiative, which will include reference designs and architectures and validation tools coming to market in the first quarter of next year. Keys to the effort will be Knights Landing and Omni-Path.

Intel first rolled out Xeon Phi in 2011, with the introduction of its Knights Ferry offering, a 22nm 60-core chip. It was an x86-based coprocessor that was designed to be used as an accelerator along the lines of GPU accelerators from Nvidia and Advanced Micro Devices, which help improve system performance while keep power consumption down.

However, Knights Landing, which offers as many as 72 cores, can be used as either a co-processor or primary processor. Built on the Silvermont architecture, the chip has more than 8 billion transistors and will deliver more than 3 teraflops of peak performance. It also includes two ports for the Omni-Path Architecture and 16GB of integrated MCDRAM (multi-channel DRAM), which Intel officials said offers more bandwidth than DDR4.

Intel also is putting the Xeon Phi into a workstation.

In a briefing with journalists in the days leading up to SC 15, Charles Wuischpard, vice president of Intel's Data Center Group and general manager of its HPC Platform Group, said the chip maker is expecting more than 50 system makers to roll out products powered by Knights Landing, though some customers and developers already have pre-production chips in hand. They include Cray, which is running a pre-production system that is running at least 10 applications as it prepares to build two systems.

In addition, Penguin Computing is building a system for Sandia National Laboratories, and Atos is developing one for CEA, the French Alternative Energies and Atomic Energy Commission.

Wuischpard also said there are 80 to 100 applications that are tuned for Xeon Phi and optimized to support the bulk of HPC workloads.

Intel's Omni-Path Architecture is designed to improve the performance of HPC applications running on large and small clusters. The fabric includes a 48-port switch that supports up to 26 percent more servers than InfiniBand within the same budget and provides up to 60 percent lower consumption. It's already being used at a number of sites, including the Texas Advanced Computing Center and Pittsburgh Supercomputer Center.